AutoPDK
Compact models, extracted autonomously.
From measured wafer data to a PDK-ready model card in under an hour. Real physics, real SPICE — the AI does the orchestration, your engineers make the decisions.
Real AutoPDK output: measured points (○) on the extracted model (—), BSIM4, bulk CMOS.
Your method in. A signed-off card out.
Drop in the data
Measurement files land; AutoPDK surveys the devices, corners, temperatures and C-V on its own.
Get a plan
Your extraction method — or ours — becomes a stage-by-stage plan with parameters and bounds. Nothing is fitted until you say go.
Fit in physics order
C-V, threshold, mobility, output, scaling, temperature — each stage fitted against real SPICE and checked before it is accepted.
Verify and report
Overlays on every device, an independent check, and a sign-off report in your own template.
BSIM4 extraction in under one hour.
A full production-style dataset — every geometry corner, three temperatures, body bias and C-V — taken from raw wafer data to a verified, sign-off-ready BSIM4 card, fully autonomously. The same flow usually books days of an expert's calendar.
Three levels of autonomy, one engine.
The same engine drives all three modes — hand it the keys, gate every step, or take the wheel yourself. Switch at any time, mid-extraction.
The AI does the modeling
Drop in measurements. The engine surveys the data, generates the decks, builds a corners-first extraction plan, fits stage by stage, self-verifies against quality gates and publishes the final report.
- Physics-ordered workflow: C-V → room-temp DC by effect → geometry scaling → temperature
- Every stage scored and accepted or retried — nothing silently passes
- Independent verifier AI on a second model cross-checks results
AI drives, you approve
Plan-first by design: the copilot proposes every stage — devices, diagrams, parameters, bounds — and nothing fits until you say GO. Intervene anywhere, then let it continue.
- Chat-native: “plan a full extraction, don’t fit until I say go”
- Review stages in the Extraction Cockpit before and after any run
- Disagreements between AI and verifier stay red until resolved
You drive, AI assists
Don’t want AI making modeling decisions? Use it as the fastest operator you’ve ever had: it does the software chores — setup, netlists, simulations, plots, reports — and touches nothing you didn’t ask for.
- Full manual cockpit: stage-based fitting, overlays, direct parameter control
- Cross-measurement diagrams: Vth vs L, gm_max vs T, custom expressions
- Model cards versioned with full lineage — every change traceable
Everything an extraction needs. Nothing to script.
Netlists written for you
Every deck — DC and C-V, every device, bias and temperature — generated from your measurements. You never author a test setup.
Your methodology
Describe your extraction flow once, in plain language. It becomes a plan the engine follows on every new technology.
Any standard model
34+ compact models ready to run — BSIM4 to HICUM, ASM-HEMT to DIODE_CMC — and any Verilog-A model on request. Model library ›
Surgical library updates
Point it at a full PDK library; only the model that needs re-extraction changes. Everything else stays byte for byte.
Reports in your format
Drop in last year's report or describe what you want — every run produces a sign-off report in that template. Reports ›
Accountable by design
Every card versioned with full lineage; an independent check must agree, or the stage stays red. Runs on-premises or in the cloud. Deployment ›
WAT / PCM wafer analysis
Parametric test data usually dies in spreadsheets. Drop a folder of WAT/PCM exports on AutoPDK — as they come from the tester, mixed lots and all — and get wafer maps, parameter trends and lot-to-lot comparisons immediately. Then ask for any plot you can describe.
Folder in, insight out
No format wrangling, no import wizards. The engine parses tester exports as-is, groups by lot, wafer, site and parameter — and untangles the messy folders too: mixed lots, split files, inconsistent naming.
Any plot you can say
“Median Vth per wafer across the lot — flag anything past 3σ.” That sentence is the plot spec: wafer maps, box plots, drift charts and site drill-downs on demand. Custom plotting without custom code — interactively, or through the API.
From fab floor to model card
PCM statistics live next to your compact models — one platform for monitoring the process and modeling the devices, with spec limits, gradients and outliers surfaced where decisions happen.
Beyond the nominal card: statistics and reliability.
A production PDK is more than one typical model. The next AutoPDK versions carry the same autonomous, physics-driven extraction into the corners, the statistics and the aging a design team signs off against.
Statistical modeling & Monte Carlo
Corner cards from measured spread; local and global variation extracted from wafer and lot data into a Monte Carlo-ready model — mismatch, process and temperature — with the same stage-by-stage checks and sign-off reports.
Reliability modeling
Aging extracted from stress measurements — bias-temperature instability, hot-carrier degradation, time-dependent dielectric breakdown — as reliability models and aging-aware corners, so a lifetime simulation rests on the fab's own silicon.
RF & S-parameter fitting
Measured S-parameters fitted against the same compact models, extending the kit to RF and high-speed devices without a second toolset.
Roadmap items are in development; AutoPDK's nominal extraction, library updates and reports are available today.
See AutoPDK on your own data.
Early access teams get a working instance — cloud or on your hardware — and an engineer who runs the first extraction with them.